View STOD1412_4233492.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

STOD1412
Step-up and inverting DC-DC converter
Features

2.7 V to 5.5 V input voltage range 120 mA max output current for each converter Output voltages: - Step-up from 4.3 V to 6.0 V - Inverting from -8.0 V to -2.0 V Synchronous rectification for both DC-DC converters Efficiency: - 80% IO = 10 mA - 30 mA - 85% IO = 30 mA - 120 mA 1.3 MHz PWM mode control Shutdown mode with Enable pin Inrush current protection Adjustable output voltages True shutdown mode Less than 1 A current consumption in shutdown mode Over-temperature protection Package: 16 pin - QFN 3X3 Temperature range: -40C to 85C
QFN16L (3mm x 3mm)

Description
The STOD1412 is a dual DC-DC converter capable of providing a positive and negative voltage from a positive input voltage ranging from 2.7 V to 5.5 V. It integrates two complete power stages, one step-up and one inverting, each of which need just one inductor, and input and output capacitor. The STOD1412 works in PWM mode, switching at a 1.3 MHz frequency, thus reducing the size and values of external components. An Enable pin makes it possible to turn off the device to reduce the quiescent current to less than 1 A. The output voltages can be set easily by using two external resistors for each converter. The device integrates a "soft start" with controlled inrush current limit, thermal shutdown and short circuit protection. High efficiency and low quiescent current, combined with the small number and tiny size of external components, make the STOD1412 suitable for battery-operated systems, particularly for powering Active Matrix OLED display panels.
Applications

Active matrix organic LED power supplies Mobile phones PDAs Camcorders Digital still cameras
Table 1.
Device summary
Order code STOD1412PUR Package QFN16L (3x3 mm) Rev. 1 Packaging 4500 parts per reel 1/21
www.st.com 21
August 2007
STOD1412
Contents
1 2 3 4 5 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.1 5.2 5.3 5.4 5.5 5.6 5.7 Setting output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Under voltage lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Load disconnect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Soft start and inrush current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 External components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.7.1 5.7.2 5.7.3 Inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6 7 8 9
Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/21
STOD1412
Diagram
1
Figure 1.
Diagram
Block diagram
3/21
Pin configuration
STOD1412
2
Figure 2.
Pin configuration
Pin connections (top view)
Table 2.
Pin n 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Pin description
Symbol VO1 TRIM TRIM TRIM FB1 VREF GND FB2 VI EN TRIM VCC Lx2 VO2 PGND Lx1 Exp pad Step-up converter output voltage. Trimming pin. This pin must be left floating. Trimming pin. This pin must be left floating. Trimming pin. This pin must be left floating. Feedback pin of the step-up converter. External voltage reference. A CREF = 100 nF ceramic capacitor must be connected to this pin. Signal ground pin. This pin must be connected to PGND pin. Feedback pin of the inverting converter. Input supply voltage. Enable control pin. ON = VI. When pulled low the device goes into shutdown mode. Trimming pin; this pin must be left floating. Power input supply voltage. Switching node of the inverting converter. Inverting converter output voltage. Power ground pin. Switching node of the step-up converter. Exposed pad. This pin must be connected to VO2. Description
4/21
STOD1412
Maximum ratings
3
Table 3.
Symbol VI, VCC EN ILx2 Lx2 VO2 FB2 FB1 VO1 Lx1 ILx1 VREF PD X TJ
Maximum ratings
Absolute maximum ratings
Parameter DC supply voltage Enable pin Switching current of the converter Inverting converter switching node Inverting converter output voltage Inverting converter feedback pin Step-up converter feedback pin Step-up converter output voltage Step-up converter switching node Step-up converter's switching current Reference voltage Power dissipation Storage temperature range Operating junction temperature range Value -0.3 to 6 -0.3 to 6 Internally limited -10 to VI+0.3 F10 to GND+0.3 -1 to +1 -0.3 to VI+0.3 -0.3 to 6 -0.3 to OUT1+0.3 Internally limited -0.3 to 3 Internally Limited -65 to 150 -40 to 85 Unit V V A V V V V V V A V mW C C
Table 4.
Symbol RthJA
Thermal data
Parameter Thermal resistance junction-ambient Value 49 Unit C/W
5/21
Electrical characteristics
STOD1412
4
Table 5.
Electrical characteristics
Electrical characteristics (TJ=25C, VI =VCC=3.7 V, CI=2.2 F, CO1,2=4.7 F, C3=1 F, CREF=100 nF, L1=4.7 H, L2=6.8 H, IO1,2=IO1-IO2=30 mA, VEN=VI, VO1=4.6 V, VO2=-6.4 V, R1=470 k R2=166 k, , R3=533 k R4=100 k unless otherwise specified). , ,
Parameter Test condition Min. Typ. Max. Unit
Symbol Supply section
Supply input voltage VI Operating input voltage range Under voltage lockout HIGH Under voltage lockout LOW Input current Quiescent current Enable high threshold Enable low threshold Enable input current VFB1=1.3 V, VFB2= -0.5 V (no switching) No Load VEN=GND VI=2.7 V to 4.5 V VI=2.7 V to 4.5 V VEN=VI VCC
2.7 2.7 2.55 2.5 0.5 3.5
5.5 V 4.5 V V 1 mA 1 A
UVLO_H UVLO_L
I_VI IQ VEN H VEN L IEN
1.2 0.6 1 V A
Dynamic performance Freq. D1MAX D2MAX Frequency Maximum duty cycle Maximum duty cycle No load No load IO1,2=10 to 30 mA, VO1=4.6 V, VO2= -6.4 V IO1,2=30 to 120 mA, VO1=4.6 V, VO2= -6.4 V Step-up converter section VFB1 Feedback voltage on step-up (1) Static line regulation Static line regulation VI=2.7 V to 4.5 V VI=2.7 V to 4.2 V, IO1=5 mA, IO2 no load, TJ= -40C to 85C VI=2.7 V to 4.2 V, IO1=100 mA, IO2 no load, TJ= -40C to 85C 1.20 2 2 V % % 1.3 90 90 80 % 85 MHz % %
Total system efficiency
VO1 VO1
6/21
STOD1412 Table 5.
Electrical characteristics Electrical characteristics (continued) (TJ=25C, VI =VCC=3.7 V, CI=2.2 F, CO1,2=4.7 F, C3=1 F, CREF=100 nF, L1=4.7 H, L2=6.8 H, IO1,2=IO1-IO2=30 mA, VEN=VI, VO1=4.6 V, VO2=-6.4 V, R1=470 k R2=166 k, , R3=533 k R4=100 k unless otherwise specified). , ,
Parameter Test condition IO1=5 to 100 mA, IO2 no load, VI=2.7 V, TJ= -40C to 85C IO1=5 to 100 mA, IO2 no load, VI=4.2 V, TJ= -40C to 85C IO1=3 to 30 mA and IO1=30 to 3 mA, TR=TF=30 s IO1=10 to 100 mA and IO1=100 to 10 mA, TR=TF=30 s IO1=5 to 100 mA @ Low frequency typ.=20 kHz Min. Typ. 2 2 20 30 20 120 VO1 below 10% of nominal value 0.9 1.10 0.85 Max. Unit % % mV mV mV mA A
Symbol
VO1 VO1 VO1 VO1 VO1
IO1 I-L1MAX RDSONP1 RDSONN1
Static load regulation Static load regulation Load transient regulation Load transient regulation Ripple output voltage range Step-up range load current I peak current
Inverting converter section VFB2 Feedback voltage on inverting (1) Static line regulation Static line regulation Static load regulation Static load regulation Load transient regulation Load transient regulation Ripple output voltage range Inverting range load current I peak current VO2 below 10% of nominal value VI=2.7 V to 4.5 V VI=2.7 V to 4.2 V, IO2=5 mA, IO1 no load, TJ= -40C to 85C VI=2.7 V to 4.2 V, IO2=100 mA, IO1 no load, TJ= -40C to 85C IO2=5 to 100 mA, IO1 no load, VI=2.7 V, TJ= -40C to 85C IO2=5 to 100 mA, IO1 no load, VI=4.2 V, TJ= -40C to 85C IO2=3 to 30 mA and IO2=30 to 3 mA, TR=TF=30 s IO2=10 to 100 mA and IO2=100 to 10 mA, TR=TF=30 s IO2=5 to 100 mA @ Low frequency typ.=20 kHz -120 -1 0.63 0.65 Voltage reference IREF=10 A 1.192 1.209 1.228 -0.5 2 2 2 2 50 100 20 mV % % % % mV mV mV mA A V
VO2 VO2 VO2 VO2 VO2 VO2 VO2
IO2 I-L2MAX RDSONP2 RDSONN2 VREF
7/21
Electrical characteristics Table 5.
STOD1412
Electrical characteristics (continued) (TJ=25C, VI =VCC=3.7 V, CI=2.2 F, CO1,2=4.7 F, C3=1 F, CREF=100 nF, L1=4.7 H, L2=6.8 H, IO1,2=IO1-IO2=30 mA, VEN=VI, VO1=4.6 V, VO2=-6.4 V, R1=470 k R2=166 k, , R3=533 k R4=100 k unless otherwise specified). , ,
Parameter Voltage reference current VREF = 1.192 V capability Test Min. 100 Typ. Max. Unit A
Symbol IREF
Thermal shutdown OTP OTPHYST Over-temperature protection Over-temperature protection hysteresis 140 15 C C
1. Guaranteed by design. 2. The tolerance of external components is not included.
8/21
STOD1412
Introduction
5
Introduction
The STOD1412 is a dual DC-DC converter which produces one positive and one negative output voltage that are each independently regulated and the values of which can be adjusted with external resistors. Each DC-DC converter is able to supply up to 120 mA of current with input voltage ranging from 2.7 V and 5.5 V. The device uses a fixed-frequency PWM controller at 1.3 MHz. This control scheme simplifies noise filtering in sensitive applications and provides excellent line regulation. The operation of the STOD1412 can be best understood by referring to the block diagram in Figure 3, where the step-up control circuit is shown, and a similar scheme is adopted for the inverting section. At the start of each oscillator cycle, the SR latch is set, which turns on power switch SW1. A voltage proportional to the switch current is added to the sawtooth ramp and the resulting sum is fed into the positive terminal of the PWM comparator A2. When this voltage exceeds the level of the negative input of A2, the SR latch is reset, thus turning off the power switch. The voltage level of the negative input of A2 is set by the error amplifier A1, and it is simply an amplified version of the difference between the feedback voltage and the reference voltage. In this manner, the error amplifier sets the correct peak current level necessary to keep the output in regulation. If the error amplifier output increases, more current is delivered to the output; if it decreases, less current is delivered. The device also has a current limit circuit (not shown in Figure 2). The switch current is constantly monitored and not allowed to exceed the preset maximum switch current (IL1max, IL2-max). If the switch current reaches this value, the SR latch is reset regardless of the state of comparator A2. This current limit helps protecting the power switch as well as the external components connected to the device. The step up converter works in continuous mode detector (CMD) in the entire line and load range, while the inverting converter can work in both discontinuous mode detector (DMD) and CMD.
Figure 3.
PWM control scheme
9/21
Introduction
STOD1412
5.1
Setting output voltage
The output voltage can be set using external network resistors. The positive output voltage range is 4.3 V minimum up to a maximum of 6.0 V. It is obtained by connecting FB1 to OUT1 through R2, and FB1 to PGND through R1 (see application circuit). The positive output value can be calculated using the following formula: VO1 = (R1 + R2)/R1 x VFB1 The negative output voltage range is -8.0 V minimum up to a maximum of -2.0 V. It is obtained connecting FB2 to VREF through R3 and FB2 to PGND through R4 (see application circuit). The value of negative output can be calculated using the following formula: VO2 = (R4/R3) x VREF
5.2
Under voltage lockout
The device includes an under voltage lockout circuit. When the STOD1412 is enabled (EN pin is pulled high), the device will be OFF until the input voltage reaches the 2.55 V threshold. The UVLO circuit has a hysteresis of 50 mV, so once the device is on, it will keep working until VCC voltage falls below 2.50 V.
5.3
Enable
This function allows switching ON and OFF the device using a logic level signal. If the EN pin is pulled high the device turns ON, given that the input voltage is higher than the under voltage lockout threshold. Pulling the EN pin low turns off the device regardless of the UVLO state. In this condition the current consumption is reduced to lower than 1 A
5.4
Load disconnect
When the device is turned OFF, there is no path for the current to flow from the input power supply to the load. In the device there are two switches that allow complete disconnection of the load. This function is useful to improve battery life when the device is not in operation.
5.5
Soft start and inrush current
The device includes a soft start feature to limit inrush current when the device is turned on. This function is added to minimize battery loading at start-up.
5.6
Current limit
The step-up and inverter converters include peak current limit circuitry. The inductor peak current cannot exceed 900mA for the step-up stage and 1A for the inverting stage.
10/21
STOD1412
Introduction
5.7
5.7.1
External components
Inductor
The 1.3 MHz frequency allows the use of small inductors for both converters. In typical applications, a 4.7 H and a 6.8 H are recommended for step-up and inverting respectively. Larger values of inductor reduce the ripple inductor current. The inductor's current saturation rating must exceed the peak current.
5.7.2
Capacitors
In order to reduce the ripple voltage on the outputs it is recommended to use capacitors with low equivalent series resistance (ESR) on output filters. The interaction between the ESR value of the capacitor and peak inductor current determines the amplitude of the ripple on the output voltage. The suggested value for output capacitors is 4.7 F. In order to filter the input voltage variations, a ceramic capacitor must be connected between VCC and PGND. A minimum value of 2.2 F is recommended. This value may be increased to further reduce the noise coming from input power supply. A 100 nF to 1 F capacitor on the VREF pin is also recommended.
5.7.3
PCB Layout
Board layout is important due to high current levels and high switching frequency that could radiate noise. It is important to connect the signal GND pin, the input and output capacitor ground leads and power ground to a single connection point to obtain a star ground configuration. This minimizes ground noise and improves regulation. It is useful to minimize lead lengths in order to reduce stray capacitance, trace resistance to avoid voltage drops and noise irradiation, especially to the feedback circuit, ground circuit and LX_ traces. Place feedback resistors close to their respective feedback pins. Place input capacitors as close as possible to VCC and PGND.
Figure 4.
Star ground plane
11/21
Typical application
STOD1412
6
Figure 5.
Typical application
Typical application circuit
Table 6.
Symbol L1 L2 CI C3 C01,2 CFb CREF R1 R2 R3 R4
External components (see Figure 5.)
Parameter Inductor Inductor Ceramic capacitor SMD Ceramic capacitor SMD - OPTIONAL Ceramic capacitor SMD Ceramic capacitor SMD Ceramic capacitor SMD Feedback resistors Feedback resistors Feedback resistor Feedback resistor Min Typ. 4.7 6.8 2.2 1 4.7 22 1 470 166 533 100 Max Unit H H F F F nF F k k k k
12/21
STOD1412
Typical performance characteristics
7
Figure 6.
Typical performance characteristics
System efficiency vs. output current Figure 7. IPK current step-up vs. input voltage
Figure 8.
IPK current inverting vs. input voltage
Figure 9.
Voltage reference vs. temperature
Figure 10. VFB1 on step-up vs. temperature
Figure 11. Line VFB1 on step-up vs. temperature
13/21
Typical performance characteristics
STOD1412
Figure 12. VFB2 on inverting vs. temperature
Figure 13. Line VFB2 on inverting vs. temperature
Figure 14. Load transient response (step-up)
Figure 15. Line transient response
VIN=3.7V, IOUT=3mA to 30mA, TRISE=TFALL=30s, T=25C
VIN=3V to 3.5V, IOUT1,2 = 120mA, TRISE=TFALL=50s, T=25C
Figure 16. Start-up voltage
VIN=0V to 2.5V, T=25C
14/21
STOD1412
Package mechanical data
8
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
15/21
Package mechanical data
STOD1412
Figure 17. QFN16L package outline
7997239/A
16/21
STOD1412
Package mechanical data
Table 7.
Dim.
QFN16L mechanical data
mm. Min. Typ. 0.75 0.02 0.20 0.18 2.90 1.50 2.90 1.50 0.25 3 1.70 3 1.70 0.50 0.30 0.40 0.50 0.012 0.30 3.10 1.80 3.10 1.80 0.007 0.114 0.059 0.114 0.059 Max. 0.80 0.05 Min. 0.028 0 inch. Typ. 0.030 0.001 0.008 0.010 0.118 0.067 0.118 0.067 0.020 0.016 0.020 0.012 0.122 0.071 0.122 0.071 Max. 0.031 0.002
A A1 A3 b D D2 E E2 e L
(1)
0.70 0
1. The value of "L" a JEDEC norm is MIN 0.35 - MAX 0.45.
17/21
Package mechanical data
STOD1412
Tape & reel QFNxx/DFNxx (3x3) mechanical data
mm. Dim. Min. A C D N T Ao Bo Ko Po P 3.3 3.3 1.1 4 8 12.8 20.2 60 14.4 0.130 0.130 0.043 0.157 0.315 Typ. Max. 180 13.2 0.504 0.795 2.362 0.567 Min. Typ. Max. 7.087 0.519 inch.
18/21
STOD1412
Package mechanical data
Figure 18. QFN16L footprint - recommended data
19/21
Revision history
STOD1412
9
Table 8.
Date
Revision history
Document revision history
Revision 1 Initial release. Changes
31-Aug-2007
20/21
STOD1412
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
(c) 2007 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
21/21

▲Up To Search▲

Price & Availability of STOD1412

	To Download STOD1412 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .